TITLE: ( Senior ) SoC Design Engineer（总线设计）--上海 苏州 杭州 成都
JOB RESPONSIBILITY：
1. Module-level architecture definition and design;
2. Module-level RTL implementation;
3. Simulation/Verification at both module level and system level;
4. Module-level synthesis and timing analysis;
5. Writing design spec and report;
6. FPGA/silicon debug on related modules.
JOB QUALIFICATIONS:
1. Bachelor degree or Master degree in ASIC Design Relevant;
2. ＞3 years of SoC design experience;
3. Experience on AXI/AHB bus structure and arbiter.
4. Solid knowledge on digital IC design; Strong skills of Verilog RTL coding and simulation; Hands-on experiences on EDA tools, such as Cadence and Synopsys tools; Familiar with C language;
5. Relevant experiences on STB product;
6. Good communication skills and Good oral/written English.
TITLE: ASIC Design Engineer（Multimedia） -- 上海 成都
JOB RESPONSIBILITY：
1. Multimedia IP design including Video Decoder, Video Post Processing, Audio, etc;
2. Testbench creation, and verification for module level, IP level, and system level;
3. IP delivery for SoC projects, and co-work with SoC team to make sure the quality of IP meets the quality criteria.
JOB QUALIFICATIONS:
1. Bachelor or Master in Micro Electronics, Electronic Engineering, Computer Science or related;
2. More than 3 years experience in related field;
3. Familiar with Verilog and C language;
4. Familiar with following domain(s) is one plus
a) Image processing
b) Video processing
c) Video codec
d) Audio processing
TITLE: Senior CAD Engineer --上海
JOB DESCRIPTION:
1. Support RD linux network, be familiar with hardware/OS/network;
2. Perl/SKill/TCL script support, developing necessary scripts or tools to support IC designers;
3. Support EDA design flow and EDA tool, for both frontend and backend;
4. Support timing characterization flow for stand cell, io, memory, analog ip.
QUALIFICATION:
1. BSEE with minimum 4-years or MSEE with minimum 2-years of experience;
2. Familiar with EDA design flow for mixed-signal design;
3. Familiar with UNIX/Linux Operating system,VNC;
4. Familiar with Computer languages such as C, C++, perl/TCL/C-shell/python;
5. LSF or SGE experience is a plus;
6. Good communication skills.
TITLE: Senior Physical Design Engineer --上海
JOB DESCRIPTION:
1. Perform analog/RF and mixed-signal circuit physical design; including high performance LNA ,PA,Bluletooth,Wifi,PLL, ADC/DAC, Amplifier, BandGap, regulators, I/O Cells etc;
2. Responsibilities include physical design of demanding mixed-signal and Analog/RF layout blocks, chip-level floorplanning, place and route of digital blocks, top-level chip assembly, full-chip verification, chip tapeout;
3. Perform layout verification (DRC, LVS and other rule checking in today’s advanced IC technology);
4. Modify and verify in-house DRC & LVS command files.
JOB QUALIFICATIONS:
1. BS with above 2 years of industry IC layout experience; BSEE is preferred;
2. Good understanding of basic electronic principles dealing with circuit and layout design;
3. Solid understanding and experience in key analog layout considerations. Such as device matching, parasitic, noise coupling, sensitive signal routing, current density and reliability considerations;
4. Familiar with layout methodologies, flow and CAD tools such as Cadence virtuoso, PCELL layout, Calibre physical verification. Prefer experience with Place and Route, full chip SOC integration, tape out.
基于澜至芯片进行 linux /Android系统下的 Drm相关开发。
包括: playready/widevine porting;secure video path development;TEE related player development;Android Go releated development.
TITLE: 高級無線通訊算法設計工程師-- 台北
工作內容：
1. DSP baseband algorithm design for WiFi digital communication systems;
2. Performance verification on the FPGA plaftform;
3. MATLAB/C/C++ coding,and simulation to verify the algorithm performance;
4. IC bring up, system verification and debugging;
5. Cross-Team co-operation to figure out system issues;
6. Architecture design for digital communication system;
7. Digital IC design for cost and power consumption efficiency for high speedcomputation logic system.
工作条件：
1. 熟悉OFDM System 尤佳；
2. 通訊IC 基頻模擬與設計；
3. 具備信號處理，通道編碼、同步等相關知識與經驗。
TITLE: Senior Digital IC Designer (WLAN) -- 台北
工作內容：
1. WLAN MAC 數位IC電路設計;
2. WLAN MAC 架構規劃;
3. 與802 .11 WLAN PHY 整合;
4. WLAN MAC S/W H/W co-simulation;
5. FPGA實作與系統驗證。
工作內容：
1. Driver development;
2. ASIC/FPGA verification;
3. Audio/Video streaming application development;
4. WiFi/IoT application development;
5. System software development & integration;
6. Product development;
7. Resolve Customer's field issues.
工作條件：
1. BS/MS degree major in CS or CS related field;
2. Be proficient either in Linux kernel or Linux application programming, be familiar with Linux source code;
3. Strong experience in programming with C, C++/Java is a Plus;
4. Good programming and debugging skills;
5. Good communication skill, team work spirit, self-motivated;
6. Familiar with MIPS/ARM cpu architecture is a Plus;
7. Familiar with WiFi domain knowledge is a Plus;
8. Familiar with Embedded Firmware Development is a Plus;
9. Familiar with Open source software development is a Plus.