感谢您对澜至电子的关注与认可,如果觉得职位匹配可直接发送简历至邮箱(super.zhou@montage-lz.com),如您身边有合适的朋友,也欢迎推荐,收到简历后,我们会尽快处理,谢谢。
职位简介:
TITLE: ( Senior ) SoC Design Engineer(总线设计)--上海 苏州 杭州 成都
JOB RESPONSIBILITY:
1. Module-level architecture definition and design;
2. Module-level RTL implementation;
3. Simulation/Verification at both module level and system level;
4. Module-level synthesis and timing analysis;
5. Writing design spec and report;
6. FPGA/silicon debug on related modules.
JOB QUALIFICATIONS:
1. Bachelor degree or Master degree in ASIC Design Relevant;
2. >3 years of SoC design experience;
3. Experience on AXI/AHB bus structure and arbiter.
4. Solid knowledge on digital IC design; Strong skills of Verilog RTL coding and simulation; Hands-on experiences on EDA tools, such as Cadence and Synopsys tools; Familiar with C language;
5. Relevant experiences on STB product;
6. Good communication skills and Good oral/written English.
TITLE: ASIC Design Engineer(Multimedia) -- 上海 成都
JOB RESPONSIBILITY:
1. Multimedia IP design including Video Decoder, Video Post Processing, Audio, etc;
2. Testbench creation, and verification for module level, IP level, and system level;
3. IP delivery for SoC projects, and co-work with SoC team to make sure the quality of IP meets the quality criteria.
JOB QUALIFICATIONS:
1. Bachelor or Master in Micro Electronics, Electronic Engineering, Computer Science or related;
2. More than 3 years experience in related field;
3. Familiar with Verilog and C language;
4. Familiar with following domain(s) is one plus
a) Image processing
b) Video processing
c) Video codec
d) Audio processing
TITLE: Natural Language Processing Engineer--上海
JOB DESCRIPTION:
1. 面向智能家居的NLP芯片的研发;
2. 基于深度学习的语音识别/语义分析处理系统的研发;
JOB QUALIFICATIONS:
1. 2019应届毕业生,CS/EE 相关专业的硕士及以上学历;
2. 有以下一项相关的知识背景:
语音识别/语言模型/分词/情感分析/语义分析/知识图谱等;
3. 有一定的深度学习经验;
4. 良好的沟通与团队协作能力,基本英语听说读写能力。
TITLE: Senior CAD Engineer --上海
JOB DESCRIPTION:
1. Support RD linux network, be familiar with hardware/OS/network;
2. Perl/SKill/TCL script support, developing necessary scripts or tools to support IC designers;
3. Support EDA design flow and EDA tool, for both frontend and backend;
4. Support timing characterization flow for stand cell, io, memory, analog ip.
QUALIFICATION:
1. BSEE with minimum 4-years or MSEE with minimum 2-years of experience;
2. Familiar with EDA design flow for mixed-signal design;
3. Familiar with UNIX/Linux Operating system,VNC;
4. Familiar with Computer languages such as C, C++, perl/TCL/C-shell/python;
5. LSF or SGE experience is a plus;
6. Good communication skills.
TITLE: Senior Physical Design Engineer --上海
JOB DESCRIPTION:
1. Perform analog/RF and mixed-signal circuit physical design; including high performance LNA ,PA,Bluletooth,Wifi,PLL, ADC/DAC, Amplifier, BandGap, regulators, I/O Cells etc;
2. Responsibilities include physical design of demanding mixed-signal and Analog/RF layout blocks, chip-level floorplanning, place and route of digital blocks, top-level chip assembly, full-chip verification, chip tapeout;
3. Perform layout verification (DRC, LVS and other rule checking in today’s advanced IC technology);
4. Modify and verify in-house DRC & LVS command files.
JOB QUALIFICATIONS:
1. BS with above 2 years of industry IC layout experience; BSEE is preferred;
2. Good understanding of basic electronic principles dealing with circuit and layout design;
3. Solid understanding and experience in key analog layout considerations. Such as device matching, parasitic, noise coupling, sensitive signal routing, current density and reliability considerations;
4. Familiar with layout methodologies, flow and CAD tools such as Cadence virtuoso, PCELL layout, Calibre physical verification. Prefer experience with Place and Route, full chip SOC integration, tape out.
TITLE: 高级软件工程师 (CA项目DVB认证) --上海 苏州 杭州 成都
岗位职责:
1. 对接高安厂商完成机顶盒认证的相关工作,包含需求沟通/设计评审/文档review以及和认证实验室的对接协调;
2. 从机顶盒产品角度,对芯片部门提供需求和建议;
3. 基于高安软件SDK完成机顶盒项目/客户端的对接支持;
4. 对接客户,包括需求分析和支持,现场测试以及量产支持。
任职要求:
1. 计算机/电子工程/通信类专业本科以上学历;
2. 3-5年以上嵌入式软件开发经验;
3. 精通嵌入式C语言开发,熟悉C++,会使用python等脚本化工具;
4. 对于uCos,eCOS,Linux等操作系统深入了解,具备至少在1到2种操作系统下较长的开发经验;
5. 熟悉芯片级安全和软件安全的基本知识,对有机顶盒相关开发经验者优先考虑;
6. 熟悉NDS/Nagra/Conax/Irdeto/Verimatrix高安或具有相关开发经验者优先考虑;
7. 熟悉DVB/数字电视基础知识和具备相关行业经验者优先考虑;
8. 英语听说读写能力出众者优先考虑。
TITLE: 高级软件工程师 (Advanced CA、TEE) --上海 苏州 杭州 成都
岗位职责:
1. 对于机顶盒/OTT高级安全(Advanced CA)和TEE部分,完成相关驱动/BSP开发及验证;
2. 对接高安厂商并配合SoC Design团队完成和芯片认证相关的软件工作,包含初期需求/设计评审/ASIC实验室认证等;
3. 配合SoC Design团队,完成流片前/后针对高安部分的软件验证;
4. 基于高安软件SDK完成机顶盒项目/客户端的对接支持。
任职要求:
1. 计算机/电子工程/通信类专业本科以上学历;
2. 5年以上嵌入式软件开发经验;
3. 精通嵌入式C语言开发,熟悉C++,会使用python等脚本化工具;
4. 对于uCos,eCOS,Linux等操作系统深入了解,具备至少在1到2种操作系统下较长的开发经验;
5. 熟悉芯片级安全和软件安全的基本知识,对有机顶盒高安和TEE相关经验者优先考虑;
6. 熟悉NDS/Nagra/Conax/Irdeto/Verimatrix高安或具有相关开发经验者优先考虑;
7. 熟悉DVB/数字电视基础知识和具备相关行业经验者优先考虑;
8. 英语听说读写能力出众者优先考虑。
TITLE: 高级软件工程师 (音视频,驱动,系统) --上海 苏州 杭州 成都
岗位职责:
1. 音视频编解码以及同步算法开发、维护和优化;
2. 设备驱动程序设计、开发与维护(HDMI / USB / SD / SDIO / EMMC / SDRAM / FLASH / UART/SPI/NAND/DMA/TUNER/DEMOD等);
3. 文件和网络播放器架构设计、开发、维护和优化;
4. 测试代码的维护编写;
5. 芯片相关功能验证;
任职要求:
1. 本科以上电子和计算机相关专业,良好的数理基础知识;
2. 5年以上软件开发经验,有扎实的C/C++、RTOS等嵌入式软件技术基础;
3. 熟悉DVB规格,对DVB/IPTV/OTT 等多媒体相关产品有了解或有相关项目经验;
4. 精通各种音视频编解码算法以及熟悉HDMI协议;
5. 精通Linux内核编程,有丰富的Linux Kernel调试经验;
6. 熟悉外设驱动的开发与调试;
7. 乐观、积极,有良好的项目管理、时间管理、团队合作和沟通协调能力,能独挡一面解决复杂问题。
TITLE:高级软件工程师(DRM开发)--上海 苏州 杭州 成都
岗位职责:
1. 对接客户DRM需求完成机顶盒DRM模块的相关工作,包含需求沟通/设计评审/文档review/代码porting和DRM提供商的认证工作;
2. 从机顶盒产品角度,对芯片及SDK部分提出需求和建议;
3. 基于芯片软件SDK完成机顶盒项目/客户端的DRM对接支持;
4. 对接客户,包括需求分析和支持,现场测试以及量产支持。
任职要求:
1. 3年以上嵌入式软件开发经验,计算机/电子工程/通信类专业本科以上学历;
2. 精通嵌入式C语言开发,熟悉C++,会使用git/shell/gerrit等相关工具;
3. 对于Android/Linux操作系统深入了解,具备至少在1到2种操作系统下较长的开发经验;
4. 熟悉芯片级安全和软件安全的基本知识,对有机顶盒相关开发经验者优先考虑;
5. 熟悉TEE架构或具有相关开发经验者优先考虑;
6. 熟悉Secure Video Path知识和具备相关行业经验者优先考虑;
7. 参与过Google GTS/Netflix NTS相关开发及测试经验者优先考虑;
8. 英语听说读写能力出众者优先考虑。
基于澜至芯片进行 linux /Android系统下的 Drm相关开发。
包括: playready/widevine porting;secure video path development;TEE related player development;Android Go releated development.
TITLE: 高級無線通訊算法設計工程師-- 台北
工作內容:
1. DSP baseband algorithm design for WiFi digital communication systems;
2. Performance verification on the FPGA plaftform;
3. MATLAB/C/C++ coding,and simulation to verify the algorithm performance;
4. IC bring up, system verification and debugging;
5. Cross-Team co-operation to figure out system issues;
6. Architecture design for digital communication system;
7. Digital IC design for cost and power consumption efficiency for high speedcomputation logic system.
工作条件:
1. 熟悉OFDM System 尤佳;
2. 通訊IC 基頻模擬與設計;
3. 具備信號處理,通道編碼、同步等相關知識與經驗。
TITLE: Senior Digital IC Designer (WLAN) -- 台北
工作內容:
1. WLAN MAC 數位IC電路設計;
2. WLAN MAC 架構規劃;
3. 與802 .11 WLAN PHY 整合;
4. WLAN MAC S/W H/W co-simulation;
5. FPGA實作與系統驗證。
工作條件:
1. 4年以上數位電路設計經驗, 熟悉IC 設計流程以及所需之工具;
2. 熟悉網路和WLAN相關技術;
3. 實作過FPGA 經驗者尤佳;
4. 具備ECO能力.
TITLE: Senior SW Engineer(WiFi/IoT)--台北
工作內容:
1. Driver development;
2. ASIC/FPGA verification;
3. Audio/Video streaming application development;
4. WiFi/IoT application development;
5. System software development & integration;
6. Product development;
7. Resolve Customer's field issues.
工作條件:
1. BS/MS degree major in CS or CS related field;
2. Be proficient either in Linux kernel or Linux application programming, be familiar with Linux source code;
3. Strong experience in programming with C, C++/Java is a Plus;
4. Good programming and debugging skills;
5. Good communication skill, team work spirit, self-motivated;
6. Familiar with MIPS/ARM cpu architecture is a Plus;
7. Familiar with WiFi domain knowledge is a Plus;
8. Familiar with Embedded Firmware Development is a Plus;
9. Familiar with Open source software development is a Plus. |