澜至电子科技招聘英才 201901

感谢您对澜至电子科技的关注与认可，如果觉得职位匹配可直接发送简历至邮箱（super.zhou@montage-lz.com)，如您身边有合适的朋友，也欢迎推荐，收到简历后，我们会尽快处理，谢谢。



推荐成功，我们也会有精美礼品回馈各位，感谢你的支持和付出，谢谢。



职位简介：
SoC Design Engineer（RTL Design）---上海
Asic Design Engineer（Multimedia IP） ---上海/成都
Senior Embedded Software Engineer（Video Decoder）---上海

Senior RF Design Engineer（WIFI/BT）---上海
Natural Language Processing Engineer---上海
IC Design Engineer（Analog）---上海

Senior CAD Engineer---上海
Senior Physical Design Engineer---上海
Senior FAE（STB方向，软硬件）---深圳
Senior FAE（WIFI方向，偏软件）---深圳
Senior Software Engineer---上海
Senior Software Engineer（DRM开发）---沪苏杭蓉
Senior Software Engineer（CA项目 DVB认证）---沪苏杭蓉
Senior Software Engineer （音视频，驱动，系统）---沪苏杭蓉
Senior SoC Design Engineer（Integration）---杭州



TITLE: SoC Design Engineer（RTL Design）---上海


JOB DESCRIPTION:
1. Module-level architecture definition and design;
2. Module-level RTL implementation;
3. Simulation/Verification at both module level and system level;
4. Module-level synthesis and timing analysis;
5. Writing design spec and report;
6. FPGA/silicon debug on related modules.

JOB QUALIFICATIONS:
1. Bachelor degree or Master degree in ASIC Design Relevant;
2. ＞2 years of SoC design experience;
3. Solid knowledge on digital IC design; Strong skills of Verilog RTL coding and simulation; Hands-on experiences on EDA tools, such as Cadence and Synopsys tools; Familiar with C language;
4. Relevant experiences on STB product;
5. Good communication skills and Good oral/written English.


TITLE: ASIC Design Engineer（Multimedia IP） --- 上海 成都

JOB RESPONSIBILITY：
1.        Multimedia IP design including Video Decoder, Video Post Processing, Audio, etc;
2.        Testbench creation, and verification for module level, IP level, and system level;
3.        IP delivery for SoC projects, and co-work with SoC team to make sure the quality of IP meets the quality criteria.


JOB QUALIFICATIONS:
1.        Bachelor or Master in Micro Electronics, Electronic Engineering, Computer Science or related;
2.        More than 3 years experience in related field;
3.        Familiar with Verilog and C language;
4.        Familiar with following domain(s) is one plus
a)        Image processing
b)        Video processing
c)        Video codec
d)        Audio processing


Senior Embedded Software Engineer（Video Decoder）---上海

JOB DESCRIPTION:
1. Work with ASIC design team for the video decoder system performance and function validation including fw/hw co-simulation and FPGA verification and participate in test cases review;
2. Design and develop multi-format video decoder/display firmware on embedded system and participate in code review;
3. Co-work closely with Software team to improve the framework of firmware and driver, define and implement the API function and customize generic firmware to specific products;
4. Solve bugs from SW/HW designer, fix problems and customer-specific issues;
5. Trace project schedule.

JOB QUALIFICATIONS:
1. Bachelor or Master in electronic engineering ,computer science;
2. 3 years experience or above;
3. Strong C/C++ programming experience is required; Strong knowledge of Video codec, such as MPEG-1, MPEG-2, H.264 and HEVC; knowledge demux and video display module; Knowledge of Multimedia APIs such as DXVA, XVBA, MFT, OpenMax etc;
4. Knowledge of real-time operating system and RISC;
5. English reading/writing, Windows office tools.

Senior RF Design Engineer（WIFI/BT）---上海

JOB DESCRIPTION:
- Circuit design for IC blocks, such as LNA, Mixer, VGA/PGA, LPF/BPF, VCO, XO, PLL, LO, PDET, BG, or LDO, based on block design specification; Since we have been working in low-power WiFi and BT transceiver SoC’s, more IC blocks need to be included, like PA, Modulator and DC-DC converter.
- Circuit simulation and post-layout simulation for the IC blocks in SpectreRF/ Spectre and/or AMS over PVT;
- Layout floor planning and support for layout design of the IC blocks;
- Test planning and characterization of the IC blocks in Lab and ATE environments;
- IC block topology and specification together with chip design leader and system engineer.

JOB QUALIFICATIONS:
- PhD or MSEE with 2+/5+ years of experience in RF/analog IC development
- Advanced understanding of engineering fundamentals
- Advanced design skills in the following areas:
a. RF:LNA, Mixer, PA, VCO, Fractional-N Synthesizer
b. Power management circuit : DC-DC converter, LDO
c. Analog: Analog filter, calibration, RSSI, opamps, bandgap, references
- Good understanding of device physics and CMOS fabrication processes
- Good understanding of layout tradeoffs for optimal performance and size
- Understanding of Spectre & SpectreRF tool. Verilog-AMS experience is a plus
- Hand-on experience on test equipments
- Understanding of analog/digital signal processing & communication system theory is a plus.
- Design experiences in deep-submicron (5 years of SoC design experience;
3. Strong background on ASIC design scope; Skilled on how to balance resource, scope and schedule;
4. Relevant experiences on CPU, BUS, DDR, Peripheral, CLK, RESET, DFT.
5. Perl/Tcl scripting skill is highly preferred;

感谢您对澜至电子科技的关注与认可，如果觉得职位匹配可直接发送简历至邮箱（super.zhou@montage-lz.com)，如您身边有合适的朋友，也欢迎推荐，收到简历后，我们会尽快处理，谢谢。



推荐成功，我们也会有精美礼品回馈各位，感谢你的支持和付出，谢谢。