STM32F103增强型定时器（TIM1，TIM8）输出PWM

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有关STM32F103增强型定时器（TIM1，TIM8）输出PWM（互补加死区）

作者：猎人fpga 文章来源：猎人fpga 点击数：6874 更新时间：2013-9-4

需求，输出两组互补PWM，频率为100KHz，占空比可调，死区时间600nS。

对于STM32的定时器配置，主要涉及3部分，时基设置，输出设置以及死区与刹车功能，其配置方法如下：

void TIMER_Config(void)
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_Period = 720 - 1;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
TIM_TimeBaseInit(TIM8, &TIM_TimeBaseStructure);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; //Set as the BiPolarity Output
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;
TIM_OCInitStructure.TIM_Pulse = 100;
TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC1PreloadConfig(TIM8, TIM_OCPreload_Enable);
TIM_OC1Init(TIM1, &TIM_OCInitStructure);//Set the Channel 1 of TIMER1
TIM_OC1Init(TIM8, &TIM_OCInitStructure);//Set the Channel 1 of TIMER8
//Set the Dead time
/*
To set the deadtime(TD),is to determ the regesiter DTG[7:0]
DTG[7:0]:(Dead-time generator setup)
DTG[7:5]=0xx => DT=DTG[7:0]*Tdtg, Tdtg = Tdts;
DTG[7:5]=10x => DT=(64+DTG[5:0])*Tdtg, Tdtg = 2*Tdts;
DTG[7:5]=110 => DT=(32+DTG[4:0])*Tdtg, Tdtg = 8*Tdts;
DTG[7:5]=111 => DT=(32+DTG[4:0])*Tdtg, Tdtg = 16*Tdts;
Tdts is determined by CKD[1:0], which is from Timer control regesity TIMx_CR1[9:0]
representing the meaning of the Timer clock Devider
CKD[1:0] = 00 Tdts = TCK_INT
CKD[1:0] = 01 Tdts = 2 * TCK_INT
CKD[1:0] = 10 Tdts = 4 * TCK_INT
CKD[1:0] = 11 Reserved
Where TCK_INT is the Timer Clock.
Here, the Tdts = TCK_INT = 1/72 uS.
So, the DT maybe as long as follows:
0nS ~ 1763nS The step is 1/72 uS
1777nS ~ 3527nS The step is 2*1/72 uS
3555nS ~ 7000nS The step is 8*1/72 uS
7111nS ~ 14000nS The step is 16*1/72 uS
Here, We make the DT equals to 600 nS, which is in the limitation of No.1.
So, DTG[7:0] = 0.6/(1/72) = 43 = 0x2B.
*/
TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable; // Disable the Break function
TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_Low;
TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable; //Enable Running State
TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable; //Enable Idle State
TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF; //Set the lock level
TIM_BDTRInitStructure.TIM_DeadTime = 0x2B;
TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Enable; //Enable the Auto Outputting.
TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);
TIM_BDTRConfig(TIM8, &TIM_BDTRInitStructure);
TIM_Cmd(TIM1, ENABLE);
TIM_Cmd(TIM8, ENABLE);
TIM_CtrlPWMOutputs(TIM1, ENABLE);
TIM_CtrlPWMOutputs(TIM8, ENABLE);
}